Ď㽶ĘÓƵ
Prof. Warren Gross belongs to the Department of Electrical and Computer Engineering at Ď㽶ĘÓƵ and directs the Integrated Systems for Information Processing lab.
2023
S. M. Abbas, M. Jalaleddine, and W. J. Gross, “List-GRAND: A practical way to achieve maximum likelihood decoding,” IEEE Trans. Very Large Scale Integr. Syst., vol. 31, no. 1, pp. 43–54, 2023. doi: 10.1109/TVLSI.2022.3223692.
D. Shin, N. Onizawa, W. J. Gross, and T. Hanyu, “Memory-efficient FPGA implementation of stochastic simulated annealing,” IEEE J. Emerg. Sel. Topics Circuits Syst., vol. 13, no. 1, pp. 108–118, 2023. doi: 10.1109/JETCAS.2023.3243260.
H.-Y. Chang, S.H. Mozafari, C. Chen, J.J. Clark, B.H. Meyer, and W.J. Gross, “PipeBERT: High-throughput BERT inference for ARM big.LITTLE multi-core processors,” Journal of Signal Processing Systems, vol. 95, no. 7, pp. 877–894, Jul. 2023. doi: 10.1007/s11265- 022-01814-y.
N. Onizawa, K. Katsuki, D. Shin, W.J. Gross, and T. Hanyu, “Fast-converging simulated annealing for Ising models based on integral stochastic computing,” IEEE Transactions on Neural Networks and Learning Systems, vol. 34, no. 12, pp. 10 999–11 005, Dec. 2023. doi: 10.1109/TNNLS.2022.3159713.
H. Zhou, J. Zheng, M. Yang, W.J. Gross, X. You, and C. Zhang, “Low-complexity sphere decoding for polar-coded MIMO systems,” IEEE Trans. Veh. Technol., vol. 72, no. 5, pp. 6810– 6815, 2023. doi: 10.1109/TVT.2022.3229557.
Q. Wu, J. Kuang, J. Tao, J. Chen, and W.J. Gross, “DsMLP: A learning-based multi- layer perception for MIMO detection implemented by dynamic stochastic computing,” IEEE Trans. Signal Process., vol. 70, pp. 6392–6403, 2022. doi: 10.1109/TSP.2023.3239170.
H. Zhou, X. Deng, Y. Cai, Y. Shen, W. J. Gross, X. You, and C. Zhang, “A Synchro-Set-Aided Breadth-First Sphere Decoder for Polar-Coded MIMO Systems,” IEEE Transactions on Signal Processing, pp. 6200-6215, January 19, 2023, 10.1109/TSP.2022.3229949.
S. M. Abbas, M. Jalaleddine, and W.J. Gross, “Guessing Random Additive Noise Decoding: A Hardware Perspective”. Springer Nature Switzerland, 2023. doi: 10.1007/978-3-031- 31663-0.
S.M. Abbas, M. Jalaleddine, C.-Y. Tsui, and W.J. Gross, “Step-GRAND: A low latency universal soft-input decoder,” in 2023 IEEE Globecom Workshops: Channel Coding beyond 5G, vol. abs/2307.07133, 2023. doi: 10.48550/arXiv.2307.07133. arXiv: 2307.07133.
H.-Y. Chang, S. H. Mozafari, J.J. Clark, B.H. Meyer, and W.J. Gross, “High-throughput edge inference for BERT models via neural architecture search and pipeline,” in Proceedings of the Great Lakes Symposium on VLSI 2023, GLSVLSI 2023, Knoxville, TN, USA, June 5-7, 2023, H. Thapliyal, R. F. DeMara, I. Partin-Vaisband, and S. Katkoori, Eds., ACM, 2023, pp. 455–459. doi: 10.1145/3583781.3590302.
M. Jalaleddine, H. Zhou, J. Li, and W.J. Gross, “Partial ordered statistics decoding with enhanced error patterns,” in IEEE International Symposium on Information Theory, ISIT 2023, Taipei, Taiwan, June 25-30, 2023, IEEE, 2023, pp. 1096–1100. doi: 10.1109/ ISIT54713.2023.10206555.
S. H. Mozafari, J.J. Clark, W.J. Gross, and B.H. Meyer, “Training acceleration of frequency domain CNNs using activation compression,” in IEEE International Symposium on Circuits and Systems, ISCAS 2023, Monterey, CA, USA, May 21-25, 2023, IEEE, 2023, pp. 1–5. doi: 10.1109/ISCAS46773.2023.10181694.
R. Seah, H. Zhou, M. Jalaleddine, and W.J. Gross, “xSA: A binary cross-entropy simu- lated annealing polar decoder,” in 12th International Symposium on Topics in Coding (ISTC 2023), Brest, France, Sep. 2023, pp. 1–5. doi: 10.1109/ISTC57237.2023.10273491.
H. Zhou and W.J. Gross, “Hybrid GRAND sphere decoding: Accelerated GRAND for low-rate codes,” in IEEE International Symposium on Circuits and Systems, ISCAS 2023, Monterey, CA, USA, May 21-25, 2023, IEEE, 2023, pp. 1–5. doi: 10.1109/ISCAS46773. 2023.10181781.
S.H. Mozafari, J.J. Clark, W.J. Gross, and B.H. Meyer, “Efficient 1D grouped convolution for PyTorch a case study: Fast on-device fine-tuning for SqueezeBERT,” in 2023 IEEE 34th International Conference on Application-specific Systems, Architectures and Processors (ASAP), IEEE, Jul. 2023. doi: 10.1109/ASAP57973.2023.00024.
L. Shen, I. Amara, R. Li, B.H. Meyer, W.J. Gross, and J.J. Clark, “Fast fine-tuning using curriculum domain adaptation,” in 20th Conference on Robots and Vision, CRV 2023, Montreal, QC, Canada, June 6-8, 2023, IEEE, 2023, pp. 296–303. doi: 10.1109/CRV60082. 2023.00045.
2022
Elie Ngomseu Mambou, Thibaud Tonnellier, and Warren J Gross. “Improved DC-Free Run-Length Limited 4B6B Codes for Concatenated Schemes”. In: IEEE Access 10 (2022), pp. 21847–21852.
Jiajie Li and Warren J Gross. “Optimization and simplification of PCPA decoder for Reed- Muller codes”. In: IEEE Communications Letters 26.6 (2022), pp. 1206–1210.
Nghia Doan et al. “Decoding Reed-Muller codes with successive codeword permutations”. In: IEEE Transactions on Communications 70.11 (2022), pp. 7134–7145.
Nghia Doan, Seyyed Ali Hashemi, and Warren J Gross. “Fast successive-cancellation list Flip decoding of polar codes”. In: IEEE Access 10 (2022), pp. 5568–5584.
Nghia Doan, Seyyed Ali Hashemi, and Warren J Gross. “Successive-cancellation decoding of Reed-Muller codes with fast Hadamard transform”. In: IEEE Transactions on Vehicular Technology 71.11 (2022), pp. 11650–11660.
Syed Mohsin Abbas et al. “High-throughput and energy-efficient VLSI architecture for ordered reliability bits GRAND”. In: IEEE Transactions on Very Large Scale Integration (VLSI) Systems 30.6 (2022), pp. 681–693.
Syed Mohsin Abbas, Marwan Jalaleddine, and Warren J Gross. “Hardware Architecture for Guessing Random Additive Noise Decoding Markov Order (GRAND-MO)”. In: Journal of Signal Processing Systems 94.10 (2022), pp. 1047–1065.
Meyer B. Gross W. Shen L. and J.J. Clark. “Retention of Domain Adaptability in Compressed Neural Networks”. In: Edge Intelligence Workshop, Montreal. 2022.
Lulan Shen et al. “Conjugate Adder Net (CAddNet)-a Space-Efficient Approximate CNN”. In: Proceedings of the IEEE/CVF Conference on Computer Vision and Pattern Recognition. 2022, pp. 2793–2797.
Mozafari S. Clark J.J. Gross W. Li C. and B. Meyer. “BERT Inference Energy Predictor for Efficient Hardware-aware NAS”. In: Edge Intelligence Workshop, Montreal. 2022.
Negin Firouzian et al. “Utilizing latency and accuracy predictors for efficient hardwareaware NAS”. In: 2022 International Conference on Hardware/Software Codesign and System Synthesis (CODES+ ISSS). IEEE. 2022, pp. 15–16.
N. Amein et al. “SuperNAS: Fast Multi- Objective SuperNet Architecture Search for Semantic Segmentation”. In: CASES 2022: International Conference on Compilers, Architectures, and Synthesis for Embedded Systems (Embedded Systems Week 2022). 2022.
Ibtihel Amara et al. “CES-KD: Curriculumbased Expert Selection for Guided Knowledge Distillation”. In: 2022 26th International Conference on Pattern Recognition (ICPR). IEEE. 2022, pp. 1901–1907.
Ziaeefard M. Meyer B. Gross W. Amara I. and J.J. Clark. “On the Importance of Integrating Curriculum Design for Teacher Assistant-based Knowledge Distillation”. In: Edge Intelligence Workshop, Montreal. 2022.
Hang Zhang et al. “Towards Finding Efficient Students Via Blockwise Neural Architecture Search and Knowledge Distillation”. In: Edge Intelligence Workshop, Montreal. Ď㽶ĘÓƵ (Canada), 2022.
D. Vucetic et al. “Efficient Fine-Tuning of BERT Models on the Edge”. In: IEEE International Symposium on Circuits and Systems (ISCAS 2022). 2022.
Charles Le et al. “Efficient Two-Stage Progressive Quantization of BERT”. In: Proceedings of The Third Workshop on Simple and Efficient Natural Language Processing (SustaiNLP). 2022, pp. 1–9.
Ardakani A. Clark J.J. Meyer B. Le C. and W. Gross. “Dyadic Integer Only BERT”. In: Edge Intelligence Workshop, Montreal. 2022.
Mozafari S. Clark J.J. Meyer B. Kornelson M. and W. Gross. “ARMCL BERT: Novel Quantizable BERT Implementation for ARM SoCs”. In: Edge Intelligence Workshop, Montreal. 2022.
ML Kornelsen et al. “Fast Heterogeneous Task Mapping for Reducing Edge DNN Latency”. In: 2022 IEEE 33rd International Conference on Application-specific Systems, Architectures and Processors (ASAP). IEEE. 2022, pp. 64– 71.
Mozafari S. Clark J.J. Gross W. Chang H-Y. and B. Meyer. “NAS plus Pipeline for High Throughput Edge Inference BERT”. In: Edge Intelligence Workshop, Montreal. 2022. [111] Amir Ardakani et al. “Standard Deviation- Based Quantization for Deep Neural Networks”. In: 2022.
M Abdelgawad et al. “BERTPerf: Inference Latency Predictor for BERT on ARM big. LITTLE Multi-Core Processors”. In: 2022 IEEE Workshop on Signal Processing Systems (SiPS). IEEE. 2022, pp. 1–6.
S.M. Abbas, M. Jalaleddine, and WJ Gross. “GRAND for Rayleigh Fading Channels”. In: IEEE Globecom: Workshop on Channel Coding beyond 5G. IEEE. 2022.
J. Li and W.J. Gross. “Complexity Reduction and Optimization Techniques for Projection- Aggregation Decoders for Reed-Muller Codes”. In: ISTC Workshop 2022. 2022.
M. Jalaleddine et al. “Partitioned Guessing Random Additive Noise Decoding”. In: ISTC Workshop 2022. 2022.
M. Jalaleddine et al. “Assisted Guessing Random Additive Noise Assisted Decoding”. In: ISTC Workshop 2022. 2022.
2021
Implementing convolutional neural networks using hartley stochastic computing with adaptive rate feature map compression, SH Mozafari, JJ Clark, WJ Gross, BH Meyer, IEEE Open Journal of Circuits and Systems 2, 805-819, 2021
A tree search approach for maximum-likelihood decoding of Reed-Muller codes SA Hashemi, N Doan, WJ Gross, J Cioffi, A Goldsmith, 2021
IEEE Globecom Workshops (GC Wkshps), 1-6 6 2021 Hartley Stochastic Computing For Convolutional Neural Networks, SH Mozafari, JJ Clark, WJ Gross, BH Meyer, 2021 IEEE Workshop on Signal Processing Systems (SiPS), 1-6, 2021
Fault-tolerance of binarized and stochastic computing-based neural networks, A Ardakani, A Ardakani, WJ Gross, 2021 IEEE Workshop on Signal Processing Systems (SiPS), 52-57, 2021
High-throughput VLSI architecture for GRAND Markov order, SM Abbas, M Jalaleddine, WJ Gross, 2021 IEEE Workshop on Signal Processing Systems (SiPS), 158-163, 2021
High-Throughput and Energy-Efficient VLSI Architecture for Ordered Reliability Bits GRAND, S Mohsin Abbas, T Tonnellier, F Ercan, M Jalaleddine, WJ Gross, arXiv e-prints, arXiv: 2110.13776, 2021
List-GRAND: A practical way to achieve Maximum Likelihood Decoding, S Mohsin Abbas, M Jalaleddine, WJ Gross, arXiv e-prints, arXiv: 2109.12225, 2021
Decoding Reed-Muller codes with successive factor-graph permutations, N Doan, SA Hashemi, M Mondelli, WJ Gross, arXiv preprint arXiv:2109.02122, 2021
Reduced complexity RPA decoder for Reed-Muller codes, J Li, SM Abbas, T Tonnellier, WJ Gross, 2021 11th International Symposium on Topics in Coding (ISTC), 1-5, 2021
Improved Dimming Scheme based on Non-DC Free RLL Codes for VLC, EN Mambou, T Tonnellier, WJ Gross, 2021 11th International Symposium on Topics in Coding (ISTC), 1-5, 2021
Method and system for training a neural network, WJ Gross, A Ardakani, A Ardakani, US Patent App. 17/180,340, 2021
Low-complexity construction of polar codes based on genetic algorithm, H Zhou, WJ Gross, Z Zhang, X You, C Zhang, IEEE Communications Letters 25 (10), 3175-3179, 2021
High-Throughput VLSI Architecture for GRAND Markov Order, S Mohsin Abbas, M Jalaleddine, WJ Gross, arXiv e-prints, arXiv: 2108.12563, 2021
Method and apparatus for wirelessly communicating over a noisy channel with a variable codeword length polar code to improve transmission capacity, WJ Gross, AC Cavatassi, T Tonnellier, Y Ge, US Patent 11,057,053, 2021
Fast SC-flip decoding of polar codes with reinforcement learning N Doan, SA Hashemi, F Ercan, WJ Gross, ICC 2021-IEEE International Conference on Communications, 1-6 7 2021
Towards practical near-maximum-likelihood decoding of error-correcting codes: An overview, T Tonnellier, M Hashemipour, N Doan, WJ Gross, ... ICASSP 2021-2021 IEEE International Conference on Acoustics, Speech and, 2021
High-throughput VLSI architecture for soft-decision decoding with ORBGRAND, SM Abbas, T Tonnellier, F Ercan, M Jalaleddine, WJ Gross, ICASSP 2021-2021 IEEE International Conference on Acoustics, Speech and, 2021
Neural successive cancellation flip decoding of polar codes, N Doan, SA Hashemi, F Ercan, T Tonnellier, WJ Gross, Journal of Signal Processing Systems 93, 631-642 6 2021
High-Throughput VLSI architecture for Soft-Decision decoding with ORBGRAND, S Mohsin Abbas, T Tonnellier, F Ercan, M Jalaleddine, WJ Gross, arXiv e-prints, arXiv: 2105.07115, 2021
On systematic polarization-adjusted convolutional (PAC) codes, T Tonnellier, WJ Gross, IEEE Communications Letters 25 (7), 2128-2132, 2021
Training binarized neural networks using ternary multipliers, A Ardakani, A Ardakani, WJ Gross, IEEE Design & Test 38 (6), 44-52, 2021
2020
Z. Zhong, W. Gross, Z. Zhang, X. You, and C. Zhang, “Polar Compiler: Auto-Generator of Hardware Architectures for Polar Encoders,” IEEE Transactions on Circuits and Systems I, vol. 67, no. 6, pp. 2091-2102, June 2020.
B. Zheng, C. Condo, W. J. Gross, and O. Liboiron-Ladouceur, “High-throughput Low-latency Encoder and Decoder for a Class of Generalized Reed-Solomon Codes for Short-Reach Optical Communications,” IEEE Transactions on Circuits and Systems II, vol. 67, no. 4, pp. 670-674, April 2020.
N. Onizawa, S. C. *Smithson, B. Meyer, W. J. Gross, and T. Hanyu, “In-Hardware Training Chip Based on CMOS Invertible Logic,” IEEE Transactions on Circuits and Systems I, vol. 67, no. 5, pp. 1541-1550, May 2020.
H. Zhou, W. Song, W. Gross, Z. Zhang, X. You, and C. Zhang, “An Efficient Software Stack Sphere Decoder for Polar Codes,” IEEE Transactions on Vehicular Technology, vol. 69, no. 2, pp. 1257-1266, February 2020.
H. Zhou, W. J. Gross, Z. Zhang, X. You, and C. Zhang, “A Linear-Complexity Channel- Independent Code Construction Method for List Sphere Polar Decoder,” Journal of Signal Processing Systems, vol. 92, no. 7, pp. 763-774, January 28 2020.
H. Zhou, W. Gross, Z. Zhang, X. You, and C. Zhang, “Efficient Sphere Polar Decoding via Synchronous Determination,” IEEE Transactions on Vehicular Technology, vol. 69, no. 6, pp. 6777-6781, June 2020.
H. Zhou, Y. Fu, Z. Zhang, W. Gross, X. You, and C. Zhang, “An Efficient Software List Sphere Decoder for Polar Codes,” Journal of Signal Processing Systems, vol. 92, no. 5, pp. 517-528, May 2020.
S. Liu, W. J. Gross, and J. Han, “Introduction to Dynamic Stochastic Computing,” IEEE Circuits and Systems Magazine, vol. 20, no. 3, pp. 19-33, Third Quarter 2020.
F. Ercan, T. Tonnellier, and W. J. Gross, “Energy-Efficient Hardware Architectures for Fast Polar Decoders,” IEEE Transactions on Circuits and Systems I, vol. 67, no. 1, pp. 322-335, January 2020.
A. Ardakani, C. Condo, and W. J. Gross, “Fast and Efficient Convolutional Accelerator for Edge Computing,” IEEE Transactions on Computers, vol. 69, no. 1, pp. 138-152, January 2020.
F. Ercan, T. Tonnellier, N. Doan, and W. J. Gross, “Practical Dynamic SC-Flip Polar Decoders: Algorithm and Implementation,” IEEE Transactions on Signal Processing, vol. 68, no. pp. 5441-5456, 2020.
Z. Yin, W. J. Gross, and B. Meyer, “Probabilistic Sequential Multi-Objective Optimization of Convolutional Neural Networks,” Proceedings of the Design, Automation and Test in Europe Conference (DATE 2020), Virtual Conference (Grenoble, France), March 9-13, 2020, pp. 1055-1060.
Z. Ji and W. J. Gross, “Efficient On-Chip Learning Using Equilibrium Propagation,” Proceedings of the IEEE International Symposium on Circuits and Systems, Virtual Conference (Seville, Spain), October 11-14, 2020, pp. 1-5.
F. Ercan and W. J. Gross, “Fast Thresholded SC-Flip Decoding of Polar Codes,” Proceedings of the IEEE International Conference on Communications, Virtual Conference (Dublin, Ireland), June 7-11, 2020, pp. 1-7.
F. Ercan, T. Tonnellier, N. Doan, and W. J. Gross, “Simplified Dynamic SC-Flip Polar Decoding,” Proceedings of the IEEE 45th International Conference on Acoustics, Speech, and Signal Processing (ICASSP 2020), Virtual Conference (Barcelona, Spain), May 4-8, 2020, pp. 1733-1737.
N. Doan, S. A. Hashemi, and W. J. Gross, “Decoding Polar Codes with Reinforcement Learning,” Proceedings of the 2020 IEEE Global Communications Conference (Globecom 2020), Taipei, Taiwan, December 7-11, 2020.
A. Ardakani, A. Ardakani, and W. J. Gross, “Training Linear Finite-State Machines,” Proceedings of the Thirty-fourth Conference on Neural Information Processing Systems (NeurIPS 2020), Vancouver, BC, December 5-12, 2020.
A. Ardakani, A. Ardakani, and W. J. Gross, “A Regression-Based Method to Synthesize Complex Arithmetic Computations on Stochastic Streams,” Proceedings of the IEEE International Symposium on Circuits and Systems, Virtual conferece (Seville, Spain), Octover 11-14, 2020, pp. 1-5.
S. M. Abbas, T. Tonnellier, F. Ercan, and W. J. Gross, “High-Throughput VLSI Architecture for GRAND,” Proceedings of the IEEE International Workshop on Signal Processing Systems (SiPS 2020), Virtual conference (Coimbra, Portugal), October 20-22, 2020, pp. 1-6.
S. Liu, W. J. Gross, and J. Han, “Toward Efficient Training of Learning Machines using Dynamic Stochastic Computing-based Gradient Descent Circuit,” The 7th International Symposium on Brainware LSI, Sendai, Japan, February 28-29, 2020
2019
H. Zhou, C. Zhang, X. Tan, W. J. Gross, Z. Zhang, and X. You, “An Improved Software List Sphere Polar Decoder with Synchronous Determination,” IEEE Transactions on Vehicular Technology, vol. 68, no. 6, pp. 5236-5245, June 2019.
S. C. Smithson, N. Onizawa, B. Meyer, W. J. Gross, and T. Hanyu, “Efficient CMOS Invertible Logic using Stochastic Computing,” IEEE Transactions on Circuits and Systems I, vol. 66, no. 6, pp. 2263-2274, June 2019.
S. A. Hashemi, C. *Condo, M. Mondelli, and W. J. Gross, “Rate-Flexible Fast Polar Decoders,” IEEE Transactions on Signal Processing, vol. 67, no. 22, pp. 5689-5701, November 15, 2019.
K. *Han, J. Wang, W. J. Gross, and J. Hu, “Stochastic Bit-Wise Iterative Decoding of Polar Codes,” IEEE Transactions on Signal Processing, vol. 67, no. 5, pp. 1138-1151, March 2019.
F. *Ercan, T. *Tonnellier, C. *Condo, and W. J. Gross, “Operation Merging for Hardware Implementations of Fast Polar Decoders,” Journal of Signal Processing Systems, vol. 91, no. pp. 995–1007, September 15, 2019.
F. *Ercan, C. *Condo, and W. J. Gross, “Improved Bit-Flipping Algorithm for Successive Cancellation Decoding of Polar Codes,” IEEE Transactions on Communications, vol. 67, no. 1, pp. 61-72, October 3, 2019.
C. *Condo, S. A. *Hashemi, A. *Ardakani, F. *Ercan, and W. J. Gross, “Design and Implementation of a Polar Codes Blind Detection Scheme,” IEEE Transactions on Circuits and Systems II, vol. 66, no. 6, pp. 943-947, June 2019.
W. Gross and V. Gaudet, Eds., Stochastic Computing: Techniques and Applications. Springer International Publishing, 2019, 272 Pages.N. Onizawa, W. J. Gross, and T. Hanyu, “Brain-Inspired Computing,” in Stochastic Computing: Techniques and Applications, W. Gross and V. Gaudet, Eds., Springer, 2019, pp. 185-199.F. Leduc-Primeau, S. Hemati, V. C. Gaudet, and W. J. Gross, “Stochastic Decoding of Error-Correcting Codes,” in Stochastic Computing: Techniques and Applications, W. Gross and V. Gaudet, Eds., Springer, 2019, pp. 201-215.
W. J. Gross, N. Doan, E. Ngomseu Mambou, and S. A. Hashemi, “Deep Learning Techniques for Decoding Polar Codes,” in Machine Learning for Future Wireless Communications, Wiley and IEEE, 2019.
V. C. Gaudet, W. J. Gross, and K. C. Smith, “Introduction to Stochastic Computing,” in Stochastic Computing: Techniques and Applications, W. Gross and V. Gaudet, Eds., Springer, 2019, pp. 1-11.
N. Onizawa, K. Nishino, S. Smithson, B. Meyer, W. Gross, H. Yamagata, H. Fujita, and T. Hanyu, “A Design Framework for Large-Scale Invertible Logic,” Proceedings of the 53rd Annual Asilomar Conference on Signals, Systems, and Computers (Asilomar 2019), Pacific Grove, CA, November 3-6, 2019.
N. Onizawa, W. J. Gross, and T. Hanyu, “Stochastic-Computing Based Brainwave LSI Towards an Intelligence Edge,” Proceedings of the 26th IEEE International Conference on Electronics Circuits and Systems (ICECS 2019), Genova, Italy, November 27-29, 2019.
N. Onizawa, W. J. Gross, and T. Hanyu, “Stochastic Computing for Brainware LSI,” Proceedings of the 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC 2019), Hirosaki, Japan, May 12-15, 2019.
T. Tonnellier, A. Cavatassi, and W. J. Gross, “Length-Compatible Polar Codes: A Survey (Invited Paper),” Proceedings of the 53rd Annual Conference on Information Sciences and Systems (CISS 2019), Baltimore, MD, March 20-22, 2019, pp. 1-6.
E. Ngomseu Mambou, T. Tonnellier, S. A. Hashemi, and W. J. Gross, “Efficient Flicker-Free FEC Codes using Knuth’s Algorithm for Visible Light Communication,” Proceedings of the IEEE Global Communications Conference (Globecom 2019), Waikoloa, HI, USA, December 9-13, 2019.
S. A. Hashemi, N. Doan, T. Tonnellier, and W. J. Gross, “Deep-Learning-Aided Successive-Cancellation Decoding of Polar Codes,” Proceedings of the 53rd Annual Asilomar Conference on Signals, Systems, and Computers (Asilomar 2019), Pacific Grove, CA, November 3-6, 2019.
S. A. Hashemi, C. Condo, M. Mondelli, and W. J. Gross, “Rate-Flexible Fast Polar Decoders,” Proceedings of the IEEE Information Theory Workshop (ITW 2019), Visby, Gotland, Sweden, August 25-28, 2019.
N. Doan, S. A. Hashemi, F. Ercan, T. Tonnellier, and W. J. Gross, “Neural Dynamic Successive Cancellation Flip Decoding of Polar Codes,” Proceedings of the IEEE International Workshop on Signal Processing Systems (SiPS 2019), Nanjing, China, October 20-23, 2019.
N. Doan, S. A. Hashemi, E. Ngomseu Mambou, T. Tonnellier, and W. J. Gross, “Neural Belief Propagation Decoding of CRC-Polar Concatenated Codes,” Proceedings of the IEEE International Conference on Communications (ICC 2019), Shanghai, China, May 20-24, 2019, pp. 1-6.
A. Cavatassi, T. Tonnellier, and W. J. Gross, “Asymmetric Construction of Low-Latency and Length-Flexible Polar Codes,” Proceedings of the IEEE International Conference on Communications (ICC 2019), Shanghai, China, May 20-24, 2019, pp. 1-6.
A. Cavatassi, T. Tonnellier, and W. J. Gross, “Fast Decoding of Multi-Kernel Polar Codes,” Proceedings of the IEEE Wireless Communications and Networking Conference (WCNC 2019), Marrakech, Morocco, April 15-18, 2019, pp. 1-6.
A. Ardakani, Z. Ji, S. C. Smithson, B. Meyer, and W. J. Gross, “Learning Recurrent Binary/Ternary Weights,” Proceedings of the Seventh International Conference on Learning Representations (ICLR 2019), New Orleans, LA, May 6-9, 2019.
A. Ardakani, Z. Ji, A. Ardakani, and W. J. Gross, “The Synthesis of XNOR Recurrent Neural Networks with Stochastic Logic,” Proceedings of the 2019 Conference on Neural Information Processing Systems (NeurIPS 2019), Vancouver, BC, December 8-14, 2019.
W. J. Gross and V. C. Gaudet, “Preface,” in Stochastic Decoding: Techniques and Applications (W. Gross and V. Gaudet, Eds.), p. ix, 2019.
W. J. Gross and B. Meyer, “AutoML for Machine Learning at the Edge,” Huawei STW Workshop, Shenzhen, China, May 15, 2019.
W. Gross, “Polar Codes for 5G and Beyond,” Workshop on Beyond-5G and 6G (Future Wireless Research), Ottawa, ON, April 15-16, 2019.
S. A. Hashemi and W. J. Gross, “Fast, Flexible, and Area-Efficient Decoders for Polar Codes,” 2019 Information Theory and Applications Workshop, San Diego, CA, February 10-15, 2019.
F. Ercan, T. Tonnellier, and W. J. Gross, “Energy-Efficient Polar Decoders for 5G and Beyond,” McGill Engineering Competition, Montreal, November 9-10, 2019.
F. Ercan, T. Tonnellier, and W. J. Gross, “Energy-Efficient Polar Decoders for 5G and Beyond,” The Sixth IEEE Research Boost, Montreal, October 30, 2019.
A. Cavatassi, W. J. Gross, and B. Meyer, “Automated Neural Network Architecture Search for Low-Cost Keyword Spotting,” TinyML Summit, Sunnyvale, CA, March 20-21, 2019.
